This is an 8 bit Ripple Counter created for my Computer Science Computer Architecture class at A&M Central Texas!
This is one of four digital logic circuit simulations required for the class!
Previously posted vid of a 4 bit Ripple counter. This circuit is the big brother to that 4 bit!
Originally I couldn't figure out how to fit all 8 1 bit J-K flip flop circuits onto a single page within the Logisim Digital Circuit Simulator program, at first. However, I've now figured it out, and here it is! The 8 bit NAND gated J-K Flip Flop circuit Ripple Counter!
8 Bits equal 1 BYTE, thus this COULD be considered a 1 Byte Ripple Counter, right?
So, I chose to build this counter using NAND gates and J-K flip flop LATCH circuits.
You can use any type of logic gates to build any kind of latch circuits in order to build this ripple counter. You can use NOR gates, AND gates, even OR gates to build J-K flip flop latch circuits, D flip flops, T flop flops or any number of latch circuits you wish in order to create a Ripple counter.
This counter is called a RIPPLE counter because all of the latch circuits are connected in SERIES, and a SINGLE CLOCK tick initiates a waterfall, or RIPPLE, type effect throughout the circuit, as if throwing a stone in a pond, the wave created by the stone ripples across the pond...
This Ripple counter was built using Logisim digital logic circuit simulator.
Technical, Architecture, Environmental Notes(for the Geeks!):
I ran Logisim within Windows 8.1
Windows 8.1 was running within Virtual Box, which I'd set up with 2 GB RAM.
Virtual Box was running on a Win 7 Toshiba I3 4 core Laptop with 8 GB of 1600 Mhz RAM with 500 GB mechanical HD as well as a SanDisk 480 GB SSD installed within its DVD drive HD caddy!
Interesting thing to note, and this is shown within the vid, is that when I sped the clock rate up within the Ripple circuit simulation the actual CPU maxed out and caused the entire virtual box program to die! Interesting indeed!
Hope ya enjoy!
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